Recomienda este artículo a tus amigos:
Switch-Level Timing Simulation of MOS VLSI Circuits - The Springer International Series in Engineering and Computer Science Vasant B. Rao 1989 edition
Switch-Level Timing Simulation of MOS VLSI Circuits - The Springer International Series in Engineering and Computer Science
Vasant B. Rao
Only two decades ago most electronic circuits were designed with a slide-rule, and the designs were verified using breadboard techniques. Today a wide range of tools exist for analYSiS, deSign, and verification, and expert systems and synthesis tools are rapidly emerging.
210 pages, biography
| Medios de comunicación | Libros Hardcover Book (Libro con lomo y cubierta duros) |
| Publicado | 30 de noviembre de 1988 |
| ISBN13 | 9780898383027 |
| Editores | Kluwer Academic Publishers |
| Páginas | 210 |
| Dimensiones | 156 × 234 × 14 mm · 489 g |
| Lengua | Inglés |