Ravi K Gulati

Iddq Testing of Vlsi Circuits Ravi K Gulati

Marc Notes: A Special issue of Journal of electronic testing: theory and applications.; Reprinted from Journal of electronic testing: theory and applications, vol. 3, no. 4.; DDQ is subscript in IDDQ in title; testing method also known as quiescent current testing.; Includes bibliographical references and index. Table of Contents: IDDQ Testing: A Review.- Iddq Testing as a Component of a Test Suite: The Need for Several Fault Coverage Metrics.- Iddq Testing in CMOS Digital ASICs.- Reliability Benefits of IDDQ.- Quiescent Current Analysis and Experimentation of Defective CMOS Circuits.- QUIETEST: A Methodology for Selecting IDDQ Test Vectors.- Generation and Evaluation of Current and Logic Tests for Switch-Level Sequential Circuits.- Diagnosis of Leakage Faults with IDDQ.- Algorithms for IDDQ Measurement Based Diagnosis of Bridging Faults.- Proportional BIC Sensor for Current Testing.- Design of ICs Applying Built-in Current Testing. Publisher Marketing: Power supply current monitoring to detect CMOS IC defects during production testing quietly laid down its roots in the mid-1970s. Both Sandia Labs and RCA in the United States and Philips Labs in the Netherlands practised this procedure on their CMOS ICs. At that time, this practice stemmed simply from an intuitive sense that CMOS ICs showing abnormal quiescent power supply current (I-DDQ) contained defects. Later, this intuition was supported by data and analysis in the 1980s by Levi (RACD), Malaiya and Su (SUNY-Binghamton), Soden and Hawkins (Sandia Labs and the University of New Mexico), Jacomino and co-workers (Laboratoire d'Automatique de Grenoble), and maly and co-workers (Carnegie Mellon University).