Depanwita Debnath

Speaker Recognition: Real Time Verification of Vlsi Architecture Based on Mel Frequency Cepstral Coefficients Depanwita Debnath

This Research describes about the design of MFCC (Mel Frequency Cepstral Coefficient) system which is the fundamental part of speaker recognition system. The design is implemented using XILINX 11.1 software environment in VHDL, and real time implemented on FPGA family XILINX Virtex 5. The significance of MFCC algorithm in the design implies that it is used as signature in speech recognition system. Speaker recognition is a process by which the speech waves are recognized based on the unique characteristic of the speaker. Hence a speaker voice is used for verification of identity and control access to private farms. In many of the different terminologies of speaker recognition , Speech dependent system is important as it verifies both context and voice. This challenging technology has been established in this research .