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Simulation of Transport in Nanodevices F Dollfus
Simulation of Transport in Nanodevices
F Dollfus
Linear current-voltage pattern, has been and continues to be the basis for characterizing, evaluating performance, and designing integrated circuits, but is shown not to hold its supremacy as channel lengths are being scaled down.
380 pages
| Medios de comunicación | Libros Hardcover Book (Libro con lomo y cubierta duros) |
| Publicado | 13 de diciembre de 2016 |
| ISBN13 | 9781848215665 |
| Editores | ISTE Ltd and John Wiley & Sons Inc |
| Páginas | 228 |
| Dimensiones | 165 × 241 × 28 mm · 717 g |
| Editor | Dollfus, Philippe (Center for Nanoscience and Nanotechnology, Orsay, France) |
| Editor | Triozon, Francois (CEA-LETI, Grenoble, France) |