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Test Resource Partitioning for System-on-a-Chip - Frontiers in Electronic Testing Vikram Iyengar 2002 edition
Test Resource Partitioning for System-on-a-Chip - Frontiers in Electronic Testing
Vikram Iyengar
Talks about test resource partitioning and optimization techniques for plug-and-play system-on-a-chip (SOC) test automation. This book aims to position test resource partitioning in the context of SOC test automation. It presents various techniques for the partitioning and optimization of the three major SOC test resources.
232 pages, biography
| Medios de comunicación | Libros Hardcover Book (Libro con lomo y cubierta duros) |
| Publicado | 30 de junio de 2002 |
| ISBN13 | 9781402071195 |
| Editores | Springer-Verlag New York Inc. |
| Páginas | 232 |
| Dimensiones | 155 × 235 × 15 mm · 530 g |
| Lengua | Inglés |